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ATJ2085
DATA SHEET
Actions
ATJ 2085
PRODUCT DATA SHEET
(Version 1.5 08/2004)
Actions Semiconductor Co., Ltd
Copyright (c) 2004 Actions Semiconductor Co., Ltd. All rights reserved. VER 1.5 Page 0 8/18/2004
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ATJ2085
DATA SHEET
Actions
Declaration
All contents of this document are protected by copyright law and reproduction in whole or in part is prohibited without the prior written consent of Actions Semiconductor Co., Ltd. Other product names used in this publication are for identification purposes only and may be trademarks or registered trademarks of their respective companies. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable. Actions Semiconductor Co., Ltd. reserves the right to make changes to specifications and product descriptions at any time without notice, and to discontinue or make changes to its products at any time without notice. Actions Semiconductor Co., Ltd. specifically disclaims any and all liability for any consequence of the application or use of any product or circuit. Publication thereof does not convey nor imply any license under patent or other industrial or intellectual property rights. Actions Semiconductor Co., Ltd. is one of Licensee of Thomson Licensing S.A. and is approved to distribute these semiconductor devices using MPEG Layer-3 ("mp3") coding technology ("mp3 decoder chips") by Thomson Licensing S.A. Supply of this product does not convey a license nor imply any right to distribute content created with this product in revenue-generating broadcast systems (terrestrial, satellite, cable and/or other distribution channels), streaming applications (via Internet, intranets and/or other networks), other content distribution systems (pay-audio or audio-on-demand applications and the like) or on physical media (compact discs, digital versatile discs, semiconductor chips, hard drives, memory cards and the like). An independent license for such use is required. For details, please visit http://mp3licensing.com. Actions Semiconductor Co., Ltd. is one of Licensee of Microsoft Licensing, GP. Actions Semiconductor Co., Ltd. is approved to distribute these semiconductor devices using Windows Media Audio ("wma") coding technology ("wma codec chips") by Microsoft Licensing, GP. This product includes technology owned by Microsoft Corporation and cannot be used or distributed without a license from Microsoft Licensing, GP.
ADDITIONAL SUPPORT
Additional product and company information can be obtained by going to the Actions website at: www.actions.com.cn.
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ATJ2085
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CONTENTS
Declaration ................................................................................................................................................1 CONTENTS...............................................................................................................................................2 1. Description ............................................................................................................................................4 2. Features ................................................................................................................................................4 3. Pin Description ......................................................................................................................................6 3.1 Pin Sort by Number .....................................................................................................................6 4. Function Description ...........................................................................................................................10 4.1 Functional Block Diagram..........................................................................................................10 4.2 MCU Core .................................................................................................................................. 11 4.3 DSP Core................................................................................................................................... 11 4.4 DMA Controller .......................................................................................................................... 11 4.5 General Purpose IO Ports ......................................................................................................... 11 4.6 RTC/CTC/Watch Dog Timer......................................................................................................13 4.7 Oscillator/PLL.............................................................................................................................13 4.8 Power Management Unit (PMU)................................................................................................14 4.9 ADC............................................................................................................................................15 4.10 DAC..........................................................................................................................................16 4.11 Headphone Driver ....................................................................................................................17 4.13 External Memory Interface ......................................................................................................17 4.14 I2C Interface ............................................................................................................................18 4.15 USB 2.0(FS) SIE......................................................................................................................19 4.15.1 Hard Core ......................................................................................................................20 4.15.2 Interrupts........................................................................................................................20 4.16 FM Interface.............................................................................................................................20 5. Electrical Characteristics.....................................................................................................................20 5.1 Absolute Maximum Ratings .......................................................................................................20 5.2 Capacitance ...............................................................................................................................21 5.3 DC Characteristics.....................................................................................................................21 5.4 AC Characteristics .....................................................................................................................22 5.4.1 AC test input waveform ...................................................................................................22
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5.4.2 AC test output measuring points .....................................................................................22 5.4.3 Reset Parameter .............................................................................................................22 5.4.4 Initialization Parameter....................................................................................................22 5.4.5 GPIO Interface Parameter...............................................................................................23 5.4.6 Ordinary ROM Parameter ...............................................................................................23 5.4.7 External System Bus Parameter .....................................................................................24 5.4.8 Bus Operation..................................................................................................................25 5.4.9 A/D Converter Characteristics .........................................................................................27 5.4.10 Headphone Driver Characteristics Table.......................................................................27 5.4.11 LCM Driver Parameter...................................................................................................29 6. MCU/DSP Dissipation (IVDD VS. Frequency)....................................................................................30 6.1 MCU Dissipation ........................................................................................................................30 6.2 DSP Dissipation .........................................................................................................................30 7. Recommended Soldering Conditions .................................................................................................31 7.1 Soldering Conditions..................................................................................................................31 7.2 Precaution against ESD for Semiconductors ............................................................................31 7.3 Handling of Unused Input Pins for CMOS.................................................................................31 7.4 Status before Initialization of MOS Devices ..............................................................................32 8. Package Drawings ..............................................................................................................................33
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ATJ2085
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1. Description
ATJ2085 is a single-chip for flash-based digital music player. It includes an audio decoder with a high performance DSP, ADPCM record capabilities and USB interface for downloading music and uploading voice recordings. ATJ2085 also provides an interface to flash memory, LED, button and switch inputs, headphone, and microphone, and FM radio input and control. ATJ2085's programmable architecture supports the MP3, WMA and other digital audio standards. For devices like USB-Disk, ATJ2085 can act as a USB mass storage slave device to personal computer system. Its low power consumption allows a long battery life, and an efficient flexible on-chip DC-DC converter allows many different battery configurations, including 1xAA, 1xAAA, 2xAA, 2xAAA and Li-Ion. Built-in Sigma-Delta DAC & a headphone driver to directly drive low impedance headphones. The ADC includes inputs for both Microphone and Analog Audio in to support voice recording and FM radio integration features. Thus, the ATJ2085 provides a true `ALL-IN-ONE' solution that is ideally suited for highly optimized digital audio players with mass storage function.
2. Features
MPEG1/2/2.5 Audio Layer 1, 2, 3 decoder Support WMA Decoder Digital Voice Recording with Actions Speech Algorithm 24 bits DSP Core with memory and on-chip Debug Support Unit (DSU) Integrated 8-bit MCU with DSU External up to 2(cs) x 64M/128M/256M/512M/1G/2G bytes Nand type Flash accessed by MCU or DMA Built-in DMA, CTC (Counter/Timer Controller) and interrupt controller for MCU Energy saving dynamic power management (PMU) Support USB 2.0 FS(c) , Write speed(Max): 955k byte/s; Read speed(Max): 1033k byte/s
Build in Stereo 18-bit Sigma-Delta DAC Build in Key Scan Circuit (3*3) and GPIO IC interface supports Master/Slave mode, with changeable slave address Support external 8080 Interface LCM driver Support FM Radio input and 32 levels volume control Support Stereo 16-bit Sigma-Delta ADC for Microphone/FM Input, sample rate at
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ATJ2085 8/12/16/22/24/32/48KHz
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MCU run at 24.576MHz(TYP), up to 60MHz SNR: 90dB (DAC TYP) Headphone driver output 2x11mW @16 Ohm(TYP) Operating Voltage: IO: 3.0V(TYP), Core: 2.0V(TYP) Standby Leakage Current: VCC: 35uA@3.0V(TYP) , VDD: 110uA@2.0V(TYP) Low Power Consumption, designed for greater than 15 (TYP) hours of operation on a single battery life. (<65mW at typical MP3 decoder solution; <90mW at typical WMA decoder solution) 64-pin (10x10mm) LQFP package
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3. Pin Description
3.1 Pin Sort by Number
Pin No. 1 2 3 4 5 6 7 Pin Name I/O Type Driver 1.9mA Driver SCU / / / / / Reset Default Z H / / H H / Short Description
GPIO_G0 RESETVCC GND USBDUSBD+ PAVCC
BI I PWR PWR A A PWR
Bit0 of General purpose I/O port G System reset input (active low) Digital power Digital ground USB data minus USB data plus Power supply for power amplifier(two bypass
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ATJ2085
DATA SHEET capacitors are 47uF and 0.1uF)
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8 9 10 11 12 13 14 15 16 17 18 19 20
AOUTR AOUTL PAGND VRDA MICIN VMIC FMINL FMINR AGND AVCC VREFI AVDD VDDIO
AO AO PWR AO AI AO AI AI PWR PWR AI PWR PWR
/ / / / / / / / / / / / /
/ / / / / / / / / / / / /
Int. DAC right channel analog output Int. DAC left channel analog output Power amplifier ground Bypass capacitor (typ 0.47uF) Microphone pre-amplifier input (0.8V-2.2V) Power supply for microphone, 2.2V output Left channel of FM line input Right channel of FM line input Analog ground Analog power Voltage reference input (1.5V) Analog power Power output (connect to VDD through a 4.7 Ohm (typ) resistance) Power pin (When 2 Batteries mode, connect to BAT. Others mode Connect to VCC) Low resolution ADC input, 0.8--2.2V, 8Bit ADC High frequency crystal OSC input High frequency crystal OSC output Battery select. L H Two Batteries Int. DC-DC control pin. H: Disable DC-DC. L: Enable DC-DC. Bit0 of General purpose I/O port B Bit0 of key scan circuit input Bit2 of General purpose I/O port C Bit1 of General purpose I/O port B Bit1 of key scan circuit input Ground Battery monitor pin VDD DC-DC pin One Battery
21 22 23 24 25
VP LRADC HOSCI HOSCO BATSEL
PWR AI AI AO I
/ / / / /
/ / / / /
26
DCDIS GPIO_B0 KEYI0 GPIO_C2 GPIO_B1 KEYI1 GND BAT LXVDD
I BI I BI BI I PWR AI AO
/ 1.9mA Driver 1.9mA Driver 1.9mA Driver / / /
L Z / L Z / / / /
27
28
29 30 31 32
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ATJ2085 33 34 35 36 37 38 39 40 NGND LXVCC GPIO_B2 KEYI2 CE3CE2CE1VDD GPIO_B4 KEYO0 GPIO_B5 KEYO1 GPIO_B6 KEYO2 GPO_A1 ICECK GPO_A2 ICEDO GPO_A0 ICEDI ICEENICERSTVCC GND D7 D6 D5 D4 D3 D2 D1 D0 PWR AO BI I O O O PWR BI O BI O BI O O I O O O I I I PWR PWR BI BI BI BI BI BI BI BI / / 1.9mA Driver / / / / 1.9mA Driver 1.9mA Driver 1.9mA Driver 3.5mA Driver 3.5mA Driver 3.5mA Driver SCU SCU / / / / / / / / / /
DATA SHEET / / Z / H H H / Z / Z / Z / L / Z / H / H H / / L L L L L L L L NMOS ground VCC DC-DC pin Bit2 of General purpose I/O port B Bit2 of key scan circuit input 8080 interface LCM chip enable Nand Flash chip enable (optional)
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Boot up Nand Flash chip enable (must be connected to Nand Flash) Digital power Bit4 of General purpose I/O port B Bit0 of key scan circuit output Bit5 of General purpose I/O port B Bit1 of key scan circuit output Bit6 of General purpose I/O port B Bit2 of key scan circuit output Bit1 of General purpose output port A Clock input to DSU for debug Bit2 of General purpose output port A Data output from DSU for debug Bit0 of General purpose output port A Data input to DSU for debug DSU enable (active low) DSU reset (active low) Digital power Ground Bit7 of ext. memory data bus Bit6 of ext. memory data bus Bit5 of ext. memory data bus Bit4 of ext. memory data bus Bit3 of ext. memory data bus Bit2 of ext. memory data bus Bit1 of ext. memory data bus Bit0 of ext. memory data bus
41
42
43
44
45 46 47 48 49 50 51 52 53 54 55 56 57
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ATJ2085 58 59 60 61 MWRMRDCLE ALE GPIO_C1 62 IC_SDA SIRQ63 64 Notes: 1: PWR----Power Supply 4: O----Output 7. SCU----SCHIMITCU GPIO_C0 IC_SCL VDD O O O O BI BI I BI BI PWR / / / / 1.9mA Driver 1.9mA Driver /
DATA SHEET H H L L H / / H / / Ext. memory write strobe Ext. memory read strobe
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Command latch enable for NAND type flash Address latch enable for NAND type flash Bit1 of General purpose I/O port C IC Serial data (Open drain) Ext. interrupt request input Bit0 of General purpose I/O port C IC serial clock (Open drain) Digital power
2: AI----Analog Input 5: I----Input
3: AO----Analog Output 6: BI----Bi-direction
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ATJ2085
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4. Function Description
4.1 Functional Block Diagram
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4.2 MCU Core
ATJ2085 integrates 8-bit MCU with on-chip ICE support. Instruction set is compatible with Z80. Process capability is controlled by software Up to 60 MHz. ATJ2085 includes 116 Kbytes of on-chip SRAM and 29Kbytes on-chip ROM. See the following flag for on chip memory mapping.
4.3 DSP Core
24-bit Harvard architecture DSP with on-chip ICE support is built in. It works with a memory word length of 24 bits. ATJ2085 has 16KB*24bit Program Memory (PM) and (16KB-256)*24bit Data Memory (DM). Memory-Mapped Register includes DAC interface. Process capability is controlled by software Up to 72 MIPS.
4.4 DMA Controller
ATJ2085 supports 3 kinds of DMA channels. DMA1/2 support Data exchange in Memory or IO. The last DMA is USB DMA.
4.5 General Purpose IO Ports
ATJ2085 has GPOA, GPIOB, GPIOC, and GPIOG. They have different functions in different modes.
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ATJ2085 Function GPIO 0 GPOA 1 2 0 1 GPIOB 2 4 5 6 F1 (Default)
DATA SHEET F2 (Function 2)
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When ICE is used, GPO_A[2~0] Pins are ICEDO, ICECK and ICEDI; Otherwise GPO_A[2~0] is used for output function.
When choosing Keyboard function, GPIOB[2~0] Pins are KEYI[2~0], and GPIOB[6~4] are KEYO[2~0]; when not choosing Keyboard function, as
GPIOB[6-4:2-0] When keyboard function enables, while some Key in [2~0] is used as GPIOB, the relative Key in should be masked.
When I2C function enables, it is used as I2C_SCL. When as 0 IO, it is GPIO_C0, then I2C can not be enabled simultaneously GPIOC 1 Only used as GPIOC [3~0] When I2C function enables, it is used as I2C_SDA. When external interrupt enables, it is SIRQ-; and when as IO, it is GPIO_C, multiple functions can not be enabled
simultaneously. 2 GPIOG 0 GPIOG[0] when as IO, it is GPIO_C2
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4.6 RTC/CTC/Watch Dog Timer
RTC is a 24-bit counter with the following function: Time Alarm Timer CTC is a counter whose clock source is different with RTC's. Watchdog can be set from 176-milisecond to 180-second with different step.
4.7 Oscillator/PLL
ATJ2085 supports 24.576MHz crystal, which is the system clock source. A low jitter PLL referenced to 24.576MHz is used to generate clock for DSP and for serial communication protocols such as USB, UART, etc. The clock used in serial communications is 48MHz so the PLL generates frequency at multiple of 48MHz to support DSP and serial communication simultaneously. Another PLL referenced to 24.576MHz is used to generate 22.5792MHz for sample rate 44.1K/22.05KHz/11.025KHz.
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4.8 Power Management Unit (PMU)
PMU consists of DC-DC converter, regulator and battery monitor. In ATJ2085, there are two DC/DC converters and one liner regulator. One DC/DC converter is for VCC power supply and another is for VDD. The liner regulator is for VDD power supply when two battery mode or other conditions where need less external components. In ATJ2085, the default value of VCC is 3.0V and VDD is 2.0V. The regulator's default output is 2.0V; all three values can be controlled by Registers. The VCC is from 2.8V to 3.3V; VDD is from 1.6V to 2.3V; the regulator is the same as VDD. ATJ2085 supports one-battery mode, two-battery mode, USB power supply or DC power line-in.
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There are two pins for mode configurations. One is "DCDIS"; the other is "BATSEL", the truth table as follow: DCDIS 0 0 1 1 BATSEL 0 1 0 1 DC/DC1(VDD) Yes No No No DC/DC2(VCC) Yes Yes Yes No Regulator No Yes Yes Yes One Mode descriptions battery with more external
components, but more efficiency Two battery One battery with less external
components, but less efficiency USB power or DC power line-in
The pin of "DCDIS" has an on-chip pull down resistor. There is a built-in super low speed and low resolution ADC for battery monitor in ATJ2085. The level of minimum battery voltage warning can be configured by registers; the range is from 0.98V to 1.22V. The voltage level of resetting system can be controlled by register; the range is from 0.9V to 1.14V.
DF 7 ~ 6 _
DF _ 5 ~ 4
4.9 ADC
There are 3 Analog-to-Digital Converters integrated in ATJ2085: 16-bit - ADC is for MIC/FM Input/Line Input, 8-bit SAR ADC for Line Controller, and 4-bit ADC for Battery Monitor
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The internal microphone amplifier has gain for recording. The VMIC pin is the power supply (2.2V) for microphone. The audio ADC is an 18 bits sigma delta Analog-to-Digital Converter. Its input source can be selected from MIC amplifier or external FM or line-in, and it has two FIFO. ATJ2085 has an 8-bit switched-capacitor SAR Analog-to-Digital Converter (SARADC). Its input source is LRADC pin for remote control(c) , input range is 0.8-2.2V, and its FS can be 8K, 4K, 2K,
1K. In remote control only the most significant 8 bits are used
4.10 DAC
ATJ2085's DAC3 is an on-chip Sigma-Delta Modulator, composed by a high performance DAC. And the DAC analog block refers to the following diagram. The DAC interface supports 4-level play back FIFO (8 x 20-bit PCM data for L/R channel) and variable sample rates, such as 48K/ 44.1K / 32K/ 24K/ 22.05K/ 16K/ 12K/ 11.025K/ 8KHz. An on-chip PLL2 is used to generate 22.5792MHz from 24.576MHz to support 44.1K/2 2.05 K/ 11.025KHz with 256xFS clock for over-sampling, while 24.576MHz supports 48K/ 32K/ 24K/ 16K/ 12K/ 8KHz with 256XFS for over-sampling.
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ATJ2085
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4.11 Headphone Driver
The output power of ATJ2085's amplifier is 13mW(each channel).
4.12 Key Scan Interface
When key scan circuit is enabled, ATJ2085 will scan the keyboard periodically. It drives pin Key out N scan pulse in turn. When any key is pressed, the corresponding Key out N will send out the scan pulse. When a key is pressed, pin Key in N connecting the key will be found low level. There are 12 internal 8-bit registers for key value latch per scan. But only another one register (Key Scan Data Register) for MCU may access key value. Those 12 internal registers are mapped into this register, and an internal pointer is used to point to the current register to return scan data when read. Any IO write to this register will clear the internal register, and the pointer will increase by 1 and point to the next register after read is performed.
4.13 External Memory Interface
ATJ2085 can support NAND type flash from 32M to 1G bytes.
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See the following for NAND flash Read/Write timing. Read:
Write:
4.14 I2C Interface
ATJ2085's I2C can be configured as either a master or slave device. In master mode it generates the clock (I2C_SCL) and initiates transactions on the data line (I2C_SDA). Data on the I2C bus is byte oriented. Multi-Master mode, 10-bit address and Hi-speed mode are not supported. See the I2C_Bus_Specification_1995 for detailed information.
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Parameter SCL period Clock low time Clock high time Clock rise time Clock fall time data setup time data hold time
Symbol fSCL tLOW tHIGH tr tf tSU:DAT tHD:DAT
Typical 100 5 4.5 500 20 4.5 50
Unit KHZ us us ns ns us ns
4.15 USB 2.0(FS) SIE
Communications with the host can be made via speed-programmable USB interface (compliant with USB SPEC 2.0 FS(c) ). Such communications, including file downloading or uploading,
audio/video data transferring, etc., depend on different implementations to meet different requirements. 4 endpoints are provided. Endpoint 1 and endpoint 2 are capable of isochronous transfer mode, and in this case, the maximum packet size can be 1023, according to USB SPEC.
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These two endpoints employ two independent FIFO for bulk or isochronous transfers. Endpoint 0 and endpoint 3 have 8 bytes maximum packet size. There are 4 interrupt requests for each endpoint respectively. Generally, this setting should be satisfying for most practical needs. 4.15.1 Hard Core The USB block includes a USB function with one upstream port. The USB port interfaces to the micro-controller through a programmable-speed serial interface engine (SIE). The SIE allows the micro-controller to communicate with the USB host. 4.15.2 Interrupts Two groups of interrupt requests are used to notify the micro-controller that there is some USB event pending to be handled. One is Global Interrupt group, and the other is Endpoint Interrupt group. Whenever an interrupt is generated, the SIE will send a low pulse to the micro-controller. The IRQ will not be invalidated until all the pending interrupts are cleared.
4.16 FM Interface
ATJ2085 can be used as a controller with Philips FM5767 module. 2-wire or 3-wire also can be used to control the module.
5. Electrical Characteristics
5.1 Absolute Maximum Ratings
Parameter Supply voltage Symbol VDD VCC Vi Typical 2.0V 3.0V VCC >= 3.3 VCC < 3.3 Rating -0.5 to +2.7 -0.5 to +3.6 -0.5 to +3.9 -0.5 to VCC+0.6 -65 to +150 ae Unit V V V V
Input voltage Storage temperature Note: 1. TO = 25ae
Tstg
(Operating Temperature)
2. Do not short-circuit two or more output pins simultaneously. 3. If even one of the above parameters exceeds the absolute maximum ratings even momentarily, the quality of the product may be degraded. The absolute maximum ratings, therefore, specify
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the value exceeding which the product may be physically damaged. Use the product well within these ratings. 4. The specifications and conditions shown in DC Characteristics and AC characteristics are the ranges for normal operation and quality assurance of the product.
5.2 Capacitance
Parameter Input capacitance I/O capacitance Note: TO = 25ae Symbol CI CIO , VCC = 0 V. Condition fC = 1 MHz Unmeasured pins returned to 0 V MIN. MAX. 15 15 Unit pF pF
5.3 DC Characteristics
Parameter High-level output voltage Low-level output voltage High-level input voltage Low-level input voltage Input leakage current Output leakage current GPIO Drive Symbol VOH Condition IOH = -2 mA MIN. 2.4 TYP. / MAX / Unit V
VOL VIH VIL ILI ILO Idrive1 Idrive2
IOL = 2 mA / / VCC = 3.6 V, VI = VCC, 0 V VCC = 3.6 V, VI = VCC, 0 V GPOA0,GPOA1,GPOA2 Other GPIO In Full speed mode (MCU
/ 0.7*VCC -0.3 / / / /
/ / / / / 2.60 1.25
0.4 VCC + 0.6 0.4VCC 10 5 / /
V V V uA uA mA mA
IVDD Supply Current (Two battery mode) Ivcc
run 24.576MHz in internal SRAM, DSP run 36MIPS) In Standby mode In Full speed mode (MCU run 24.576MHz in internal SRAM, DSP run 36MIPS) In Standby mode
/
40
60
mA
50
110
350
uA
9
16
40
mA
25
35
70
uA
Notes
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ATJ2085 1. TA = -10 to +70 ae
DATA SHEET , VDD = 2.0 V, VCC = 3.0 V ae
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2. IVDD is the total power supply current for 2.0 V power supply. IVDD is applied to the LOGIC, PLL and OSC blocks. 3. IVCC is the total power supply current for 3.0 V power supply. IVCC is applied to the USB, IO, TP and AD blocks.
5.4 AC Characteristics (TA = -10
5.4.1 AC test input waveform
to +70 ae
, VDD = 1.8 to 2.7 V, VCC = 2.7 to 3.6 V) ae
5.4.2 AC test output measuring points
5.4.3 Reset Parameter Parameter Reset input low-level width Symbol tWRSL Condition RESET# pin MIN. 160 MAX. Unit us
5.4.4 Initialization Parameter Parameter Data sampling time (from RESET#) Output delay time (from RESET# ) Symbol tSS tOD 61.04 Condition MIN. MAX. 61.04 Unit us us
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ATJ2085 5.4.5 GPIO Interface Parameter Parameter Input level width GPIO input rise time GPIO input fall time Output level width Symbol tGPIN tGPRISE tGPFALL tGPOUT
DATA SHEET
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Condition Normal operation
MIN. 11/ fMCUCLK
MAX.
Unit s ns ns s
200 200 11/ fMCUCLK
Notes: fMCUclk is the frequency that MCU is running upon. Input level width
Input rise/fall time
Output level width
5.4.6 Ordinary ROM Parameter Parameter
Data access time (from address) Data access time (from CEx# )
Note
Symbol tACC tCE tDS tDH
Condition HOSC=24.576MHz HOSC=24.576MHz HOSC=24.576MHz HOSC=24.576MHz
MIN. 102 82 0 0
MAX.
Unit ns ns ns ns
Note
Data input setup time Data input hold time
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5.4.7 External System Bus Parameter
Parameter Address setup time (to command signal)Note 1, 2 Address hold time (from command signal)Note 1, 2 Data output setup time (to command signal)Note 1 Data output hold time(from command signal)Note 1 Data input setup time (to command signal)Note 1 Data input hold time(from command signal)Note 1
Symbol tXAS tXAS tXAH tWXDS tWXDH tRXDS tRXDH
Condition Memory Read Memory Write
MIN. 0.5T 1.5T 0.5T 0 3 0 0
MAX.
Unit ns ns ns
T 0.5T 2T
ns ns ns ns
Notes: 1. MRD#, MWR# are called the command signals for the External System Bus Interface. 2. T (ns) = 1 / fMCUCLK
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ATJ2085 5.4.8 Bus Operation Instruction Fetch Timing
DATA SHEET
Actions
Memory Read Timing
Memory Write Timing
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ATJ2085 IO Read Timing
DATA SHEET
Actions
IO Write Timing
DMA1/2 Timing
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ATJ2085 DSP Read/Write Timing
DATA SHEET
Actions
5.4.9 A/D Converter Characteristics (TA = -10 - +70ae , VDD = 2.0 V, VCC = 3.0V, Sample Rate=32KHz) Min Typ. 60 50 53 55 1 800 Max Unit dB dB dB mVpp
Characteristics Dynamic range Total Harmonic Distortion + Noise Frequency Response (20-13KHz) Full Scale Input Voltage(Gain=0dB) Note: 1. TA = -10ae
to +70ae , VDD = 2.0 V, VCC = 3.0V.
2. Sample Rate=32 KHz 5.4.10 Headphone Driver Characteristics Table Characteristics Dynamic Range -60 dBFS Input Total Harmonic Distortion + Noise Frequency Response 20-20KHz Output Common Mode Voltage Full Scale Output Voltage Inter channel Isolation (1KHz) Inter channel Gain Mismatch(1KHz) Note:1. TA =-10 - +70ae , VDD = 2.0 V, VCC = 3.0 V. 1.5 1.6 91 0.025 2.4 70 Min Typ 87 73 75 0.6 Max Unit dB dB dB V Vpp dB dB
2. Sample Rate=32 KHz.
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ATJ2085 3. Bias Current=26uA. 4. Volume Level=0x1F.
DATA SHEET
Actions
Frequency Response Diagram of Headphone Driver
Action Sem s iconductor PAFrequencyR esponse(linein->PA)@ 1Vpp 02/09/04 14:24:58
+4 +2 +0 d B r -2 -4 -6 -8
-10 20
50
100
200
500
1k H z
2k
5k
10k
20k
50k 80k
Sweep T race C olor 1 2 1 1
LineSty Thick Data le 1 1
A Comment xis
M agenta S olid B lue S olid
A mpl Left Load=100uF*100Kohm nlr.A A mpl Left Load=100uF*32ohm nlr.A Untitled1
THD + N Amplitude Diagram of Headphone Driver
Actions Semiconductor
+0 -10 -20 -30 -40 d B -50 -60 -70 -80 -90 -100
PA THD+N vs Amplitude (linein->PA)@ 1KHz Load=32ohm
02/09/04 10:19:46
200m
400m
600m
800m
1 Vpp
1.2
1.4
1.6
1.8
2
2.2
Sweep Trace Color 1 2 1 1
Line Style Thick Data 1 1
Axis Comment Right Channel Left Channel Untitled1
M agenta Solid Blue Solid
Anlr.THD+N Ratio Left Anlr.THD+N Ratio Left
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ATJ2085 5.4.11 LCM Driver Parameter
DATA SHEET
Actions
Parameter Data access time(write) Data access time (Read) Write cycle time Read cycle time Data setup time Data hold time Address setup time Address hold time Read access time Data input hold time
Symbol tPW80(W) tPW80(R) tCY80(W) tCY80(R) tDS80 tDH80 tAS80 tAH80 tACC80 tOD80
Condition HOSC=24.576mHZ HOSC=24.576mHZ HOSC=24.576mHZ HOSC=24.576mHZ HOSC=24.576mHZ HOSC=24.576mHZ HOSC=24.576mHZ HOSC=24.576mHZ HOSC=24.576mHZ HOSC=24.576mHZ
Typ 29 67 407 284 79 8 11 11 13 8
Unit ns ns ns ns ns ns ns ns ns ns
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ATJ2085
DATA SHEET
Actions
6. MCU/DSP Dissipation (IVDD VS. Frequency)
6.1 MCU Dissipation
(VBAT=1.5V, DSP under reset, VDD=2.0V, MCU runs in internal SRAM) Clock Source 32.768KHZ Divisor factor /(1--1024) /1 /2 /4 /8 /16 24.576MHz /32 /64 /128 /256 /512 /1024 350uA 5.9mA 3.3mA 1.9mA 1.2mA 1.9mA 0.7mA 0.6mA 0.58mA 0.56mA 0.55mA 0.54mA IVDD(Max)
6.2 DSP Dissipation (VBAT=1.5V, MCU run LOSC, VDD=2.0V, Vcc =3.0V)
DSP Speed (MIPS) 6 12 24 36 48 60 72 84 IVDD (Max) 3.49mA @ VDD=2.0V 6.52mA @ VDD=2.0V 11.24mA @ VDD=2.0V 16.24mA @ VDD=2.0V 21.08mA @ VDD=2.0V 28.5mA @ VDD=2.3V 33.6mA @ VDD=2.3V 38.7mA @ VDD=2.3V
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ATJ2085
DATA SHEET
Actions
7. Recommended Soldering Conditions
7.1 Soldering Conditions
Soldering Conditions for Surface-Mount Devices Soldering Process Soldering Conditions Peak package's surface temperature: 235ae Infrared ray reflow Reflow time: 30 seconds or less (210ae or more) Maximum allowable number of reflow processes: 2 Exposure limit: 3 days (10 hours of pre-baking is required at 125ae Partial heating method Terminal temperature: 300ae or less afterward).
Heat time: 3 seconds or less (for one side of a device) Note: Maximum number of days during which the product can be stored at the temperature of 25ae relative humidity of 65% or less after dry-pack package is opened. Caution: Do not apply two or more different soldering methods to one chip (except for partial heating method for terminal sections). and
7.2 Precaution against ESD for Semiconductors
Strong electric field, when exposed to a MOS device, can cause destruction of the gate oxide and ultimately degrade the device operation. Steps must be taken to stop generation of static electricity as much as possible, and quickly dissipate it once, when it has occurred. Environmental control must be adequate. When it is dry, humidifier should be used. It is recommended to avoid using insulators that easily build static electricity. Semiconductor devices must be stored and transported in an anti-static container, static shielding bag or conductive material. All test and measurement tools including work bench and floor should be grounded. The operator should be grounded using wrist strap. Semiconductor devices must not be touched with bare hands. Similar precautions need to be taken for PW boards with semiconductor devices on it.
7.3 Handling of Unused Input Pins for CMOS
No connection for CMOS device inputs can be cause of malfunction. If no connection is provided to
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ATJ2085
DATA SHEET
Actions
the input pins, it is possible that an internal input level may be generated due to noise, etc., hence causing malfunction. CMOS devices behave differently than Bipolar or NMOS devices. Input levels of CMOS devices must be fixed high or low by using a pull-up or pull-down circuitry. Each unused pin should be connected to VDD or GND with a resistor, if it is considered to have a possibility of being an output pin. All handling related to the unused pins must be judged device by device and related specifications governing the devices.
7.4 Status before Initialization of MOS Devices
Power-on does not necessarily define initial status of MOS device. Production process of MOS does not define the initial operation status of the device. Immediately after the power source is turned ON, the devices with reset function have not yet been initialized. Hence, power-on does not guarantee out-pin levels, I/O settings or contents of registers. Device is not initialized until the reset signal is received. Reset operation must be executed immediately after power-on for devices having reset function.
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ATJ2085
DATA SHEET
Actions
8. Package Drawings
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ATJ2085
DATA SHEET
Actions
Actions Semiconductor Co., Ltd.
Address: 15-1, NO.1, HIT Road, Tangjia, Zhuhai, Guangdong, China Tel: +86-756-3392353 Fax: +86-756-3392251, 3392252, 3392253 Post code: 519085 http:// www.actions.com.cn Business Email: mp-sales@actions.com.cn Technical Service Email: mp-cs@actions.com.cn
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